|
eInfochips designs IP surveillance system
| By | Upendra Patel | | Chief Technology Officer | | eInfochips Ltd |
Soon after Texas Instruments announced the DaVinci platform in September 2005, a design team at eInfochips started work on an IP based surveillance system design on the same platform. eInfochips intended to leverage its domain knowledge in streaming media applications to address what it viewed as a potentially large market. eInfochips, a provider of silicon and product design services and a member of TI's third party network had earlier designed a range of applications on TI's DM642 platform, targeting the media domain.
The design team for smart IP surveillance system comprised a system architect, hardware designer, DSP software engineers, firmware developers and web-based application programmers.
System requirements
The convergence of consumer electronics and communications has emphasised an increased sophistication in product design. The new generation of video surveillance systems require far more than just streaming video signals over a network. Storage and content analysis have become an integral part of design requirements. A typical video server takes input from a camera and streams it over Ethernet as a minimum requirement, as shown in figure 1. To understand the evolving requirements of the market, eInfochips conducted a surveillance system requirements survey, which enabled its technical and marketing teams to jointly define the system specifications.
 | | Figure 1: The typical video server streams input from the camera over Ethernet as a minimum requirement. |
The teams defined that the new generation surveillance system should have the following key attributes:
- distributed software architecture,
- implementation of advanced video compression/decompression technologies,
- facilitation of advanced motion detection and content analysis, and
- security features like watermarking.
In addition, the systems should provide for feature-rich client viewed applications and higher resolution video quality for face and object recognition.
The design goal was to provide a platform for building a surveillance system design with all possible options that a customer could decide to include or exclude at the production stage. The design had to be flexible and robust enough for quick prototyping and reducing time to market.
The typical surveillance system design specifications to be addressed by this platform were grouped into seven constituent areas—video, audio, communications, storage, audio/video processing, recording and software.
The specifications required video signals to be captured directly from CCD or CMOS image sensors. The system was targeted to support standard NTSC/PAL inputs in QCIF, CIF, VGA and D1 resolutions at 30fps. Other requirements included a remote PTZ control for camera and the capability to generate output as S-video or composite video, for spot viewing and playback of local storage.
Audio input was provided through an external microphone and the system would generate audio output in stereo. Communications support included Ethernet at 10/100Mbps and USB 2.0 host mode with IEEE 802.11b/g support as an option. Storage facilities included SD card and a USB hard disc. For audio/video processing, the user would be offered a choice of encoding formats, such as H.264, MPEG4 and JPEG, and the ability to select frame rate and resolution. The system was also provided AV sync capability with speech codec and support for video analysis software. The system would have the facility for simultaneous recording and viewing of streamed video and provide encryption on recorded content. Local recording would be on the SD card.
Software features included web-based viewing and management, multi-level password protection for configuration, data access, and content analysis and encryption of recorded content.
The processing capability requirement would support MPEG-4/H.264 resolutions at 30fps with enough headroom for video analysis software, web-based application for streaming data over Ethernet and managing all the peripheral interfaces.
The design team selected TI's DaVinci DM6446 processor platform with ARM9 operating at 297MHz and C64x+ DSP operating at 594MHz, along with hardware accelerators and a set of peripherals.
This selection was based on a specific set of expected benefits, the most prominent of which were the low bill of materials (BOM) cost of this approach as compared to a solution that included a DSP and host processor. The sharing of the DDR SDRAM by the DSP and the ARM processor eliminated data transfer issues. The solution facilitated on-chip video processing in the front-end and back-end, and provided for a rich set of peripherals and interfaces. Imaging accelerators improved codec performance. The solution also provided support for a wide variety of codecs. Other benefits included improved software partitioning capability, media processing, host software and peripheral/interface drivers, and the incorporation of an application layer (figure 2).
 | | Figure 2: The team designed a solution to address all requirements on a single platform, along with multiple options for external interfaces. |
Technical challenges
While a key challenge was to minimise the BOM, power and size of the system, the design team also had to address other significant technical challenges related to interfacing, peripherals support and signal integrity.
The team had to address the challenge of handling 1.8V and 3.3V digital interfaces on different peripherals. The system had to provide support for CMOS/CCD image sensors along with camera input on the same board. It had to handle multiplexed interfaces. The system was also required to support various boot mode options on the board.
The most significant design challenge was to keep all the interfaces on the edge of the board and still meet the requirements of signal integrity and board size. Another challenge was the availability of driver and test software for some of the interfaces. Due to these challenges, the board layout was an interactive process and had to go through run-time changes in design, resulting in longer development cycle and one re-spin of the board.
Product design challenges
Product design along with working with the new technology presented the design team with another set of challenges. Some of the significant challenges were:
- Working with preliminary datasheets to start design.
- Keeping track of silicon revisions released during the design phase.
- Parallel software development along with framework development by TI.
- Availability of components for design in smaller quantities.
- Testing multiple peripherals with the different devices available in the market.
- Validating customer requirements.
The main challenge in product development was to validate customer requirements, as this eInfochips' own design initiative. eInfochips therefore obtained input for the design by conducting discussions with technical and marketing personnel at its customers and partners.
The design had to go through one revision cycle based on an analysis of manufacturability, and testing and validation of various interfaces. The surveillance system design was tested with streaming video and third-party content analysis algorithms.
Although initially released for single-channel designs, the smart IP surveillance system can be extended to multi-channel designs.
 | Upendra Patel (upendra.patel@einfochips.com), CTO, holds a bachelors degree in Electronics and Communication and has more than 20 years experience in product design. |
|
 |
| eeForum | Webinar
